Messages in this thread Patch in this message | | | Date | Fri, 19 Jan 2007 15:02:56 +0000 | From | "Bahadir Balban" <> | Subject | Enabling IO/MEM through pci bridge |
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Hi,
On some ARM platform with multiple pci bridges, I had to add the below patch in order to enable transactions through the bridges to devices behind. I'm sure there are other platforms with similar pci setup so why wouldn't it work without it?
Thanks, Bahadir
Enable bus transactions behind bridges.
From: Bahadir Balban <bahadir.balban@arm.com>
When transactions (MEM/IO) are enabled for a device, this patch ensures also the same transactions are enabled for the bridge that they sit behind. ---
drivers/pci/setup-bus.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 8f7bcf5..a5c400e 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -150,0 +151 @@ EXPORT_SYMBOL(pci_setup_cardbus); + int i; @@ -158,0 +160 @@ pci_setup_bridge(struct pci_bus *bus) + int i; @@ -224,0 +227,15 @@ pci_setup_bridge(struct pci_bus *bus) + + for (i = 0; i < 3; i++) { + u16 csr; + if ((bus->resource[i]->flags & IORESOURCE_MEM) || + (bus->resource[i]->flags & IORESOURCE_PREFETCH)) { + pci_read_config_word(bridge, PCI_COMMAND, &csr); + csr |= (1 << 1) | (1 << 2); + pci_write_config_word(bridge, PCI_COMMAND, csr); + } + if (bus->resource[i]->flags & IORESOURCE_IO) { + pci_read_config_word(bridge, PCI_COMMAND, &csr); + csr |= (1 << 0) | (1 << 2); + pci_write_config_word(bridge, PCI_COMMAND, csr); + } + } - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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