Messages in this thread | | | From | YhLu <> | Subject | 2.6.13-rc2 with dual way dual core ck804 MB | Date | Wed, 6 Jul 2005 15:25:08 -0700 |
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andi,
the core1/node0 take a long while to get TSC synchronized. Is it normal? i guess "CPU 1: synchronized TSC with CPU 0" should be just after "CPU 1: Syncing TSC to CPU0"
YH
cpu 1: setting up apic clock cpu 1: enabling apic timer CPU 1: Syncing TSC to CPU 0. CPU has booted. waiting for cpu 1
cpu 2: setting up apic clock cpu 2: enabling apic timer CPU 2: Syncing TSC to CPU 0. CPU 2: synchronized TSC with CPU 0 (last diff -4 cycles, maxerr 1097 cycles) CPU has booted. waiting for cpu 2
cpu 3: setting up apic clock cpu 3: enabling apic timer CPU 3: Syncing TSC to CPU 0. CPU 3: synchronized TSC with CPU 0 (last diff 1 cycles, maxerr 1087 cycles) CPU has booted. waiting for cpu 3
testing NMI watchdog ... CPU#1: NMI appears to be stuck (1->1)! checking if image is initramfs...<6>CPU 1: synchronized TSC with CPU 0 (last diff 0 cycles, maxerr 595 cycles) it isn't (no cpio magic); looks like an initrd
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