Messages in this thread | ![/](/images/icornerl.gif) | | Date | Sun, 17 Aug 2003 21:25:35 +0100 | From | Jamie Lokier <> | Subject | Re: about PENTIUM4 cache line |
| |
michaelc wrote: > I read the Intel IA-32 developer's manual recently, and I found > the cache lines for L1 and L2 caches in Pentium4 are 64 bytes > wide, but the thing make me confused is that the default value > CONFIG_X86_L1_CACHE_SHIFT option in 2.4.x kernel is 7, why it's > not 6? Any expanation about this would be appreciated!
I don't recall seeing an answer to this. Was there one?
Cheers, -- Jamie - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| ![\](/images/icornerr.gif) |