Messages in this thread | ![/](/images/icornerl.gif) | | Subject | Re: [PATCH][2.5][RFT] sfence wmb for K7,P3,VIAC3-2(?) | From | Andi Kleen <> | Date | 01 Apr 2003 12:11:00 +0200 |
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On Tue, 2003-04-01 at 10:22, Zwane Mwaikambo wrote: > On Tue, 1 Apr 2003, Zwane Mwaikambo wrote: > > > +config X86_SSE > > + bool > > + depends on MK7 || MPENTIUMIII || MVIAC3_2 > > + default y > > + > > Bad option to flag against as pointed out by someone, seeing as K7 > implimented half the SSE instructions.
SSE2 != SSE1. K7 has SSE1, like the Pentium 3.
X86_SSE is SSE1
sfence is part of SSE2. That's X86_SSE2
-Andi
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