Messages in this thread | ![/](/images/icornerl.gif) | | From | Walt Drummond <> | Date | Mon, 16 Apr 2001 09:00:24 -0700 | Subject | Re: [Lse-tech] Bug in sys_sched_yield |
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Hubertus Franke writes: > I think that all data accesses particularly to __aligned_data > should be performed through logical ids. There's a lot of remapping > going on, due to the mix of logical and physical IDs. > > If indeed the physical numbers are sparse (like we had on a 4x4 > NUMA system) then indexing doesn't work anyway.
This is exactly right. On IA64, we have to hide the physical processor ID (processor bus/local ID pair) completely. As far as I can see, but it's been awhile, so forgive me if I miss one or two, IA64 doesn't expose the physical processor ID at all, outside the IPI and AP startup code.
> The right approach to me seems to move everything including p->processor > to logical and the few locations where needed otherwise (?) should > be moved to have the translation from performed there.
Yep. If not simply to make the generic kernel code clearer, this will also make it easier to support non-linear (NUMA) systems.
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