Messages in this thread | | | Date | Mon, 1 Mar 1999 11:47:31 -0500 (EST) | From | KOEHLEKR@UCRWCU ... | Subject | Re: AMD K6-2/400 and FIC VA-503+BM with Linux 2.0.36 |
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To: Linux Kernel Listserver AMD Tech Support FIC Tech Support R.E. Wolff (and anyone else you care to pass this on to whom you think might be interested)
From: Kenneth R. Koehler, PhD Associate Professor of Physics Raymond Walters College University of Cincinnati (koehlekr@ucrwcu.rwc.uc.edu or kenneth.koehler@uc.edu)
Re: AMD K6-2/400 and FIC VA-503+BM with Linux 2.0.36
First of all, I want to thank all those whose quick and helpful responses have enabled me to make progress on my problem.
It seems (as many of you suggested) that the problem was mostly thermal. Using a "Heat Sink Pen" (Radio Shack catalog # 64-4342, on sale last week for $2.99), I remounted the hink sinks/fans to the cpus after applying a more or less uniform coat to the cpu (and removing cat hairs that were caught in the liquid). All cpus save one were cured; the most dramatic cure was the cpu which I mistakenly tested before treatment. It failed repeatedly within minutes; after treatment, the test bed ran for 10 or 12 hours without a fault before I killed it.
Interestingly, the last cpu, which had always seemed to give me more frequent faults than any other, worked fine when moved to a different motherboard and equipped with a slightly larger heat sink.
After browsing through AMD's fan recommendations (found at their web site at http://www1.amd.com/products/cpg/thermals/), I noticed that only 9 out of some 60 fans tested were recommended for K6-2s at 400 MHz, while the majority were recommended at 380 or 350 MHz and below. It seems that a sort of "thermal threshold" exists for the K6-2 at 400 MHz; anybody contemplating running one should not scrimp on their cpu fan!
Lastly, I wanted to comment on the suggestions that if the test ran with the external cache turned off, the motherboard was faulty. All cpus and all motherboards ran fine with the cache turned off. While I am not qualified to design pipelined microprocessors, I do teach about them on occasion, and believe that the above "cache test" is not conclusive. By disabling the external cache, the pipeline timing is altered dramatically, effecting everything from microcode pathways to operating temperature (as I found out). It is also worth noting that the test bed ran fine at 350 MHz with the cache enabled.
Thanks again - once more I find that the linux-kernel listserve users provide some of the most timely and useful support in the computing world (this coming from a former OS support analyst with Sperry) !
Ken
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