Messages in this thread | | | Subject | Re: [PATCH v2 3/4] MIPS: Loongson64: DTS: Add SPI support to LS7A | From | Jiaxun Yang <> | Date | Tue, 8 Dec 2020 16:15:43 +0800 |
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在 2020/12/8 15:44, Qing Zhang 写道: > add spi and amd node support.
Hi Qing,
Thanks for your patch.
What is AMD node?
Also given that different boards may have different flash, is it a wise
idea to hardcode here?
Thanks.
- Jiaxun
> > Signed-off-by: Qing Zhang <zhangqing@loongson.cn> > --- > > v2: > - Add spi about pci device DT > --- > arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi > index f99a7a1..ab8836b 100644 > --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi > +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi > @@ -405,6 +405,26 @@ > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>; > }; > + > + spi@16,0 { > + compatible = "pci0014,7a0b.0", > + "pci0014,7a0b", > + "pciclass088000", > + "pciclass0880"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + reg = <0xb000 0x0 0x0 0x0 0x0>; > + num-chipselects = <0>; > + spiflash: s25fl016k@0 { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible ="spansion,s25fl016k","jedec,spi-nor"; > + spi-max-frequency=<50000000>; > + reg=<0>; > + }; > + }; > }; > > isa {
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