Messages in this thread Patch in this message | | | From | Lu Baolu <> | Subject | [PATCH 2/2] iommu/vt-d: Remove caching mode check before devtlb flush | Date | Sun, 7 Apr 2024 22:42:32 +0800 |
| |
The Caching Mode (CM) of the Intel IOMMU indicates if the hardware implementation caches not-present or erroneous translation-structure entries except the first-stage translation. The caching mode is unrelated to the device TLB , therefore there is no need to check it before a device TLB invalidation operation.
Before the scalable mode is introduced, caching mode is treated as an indication that the driver is running in a VM guest. This is just a software contract as shadow page table is the only way to implement a virtual IOMMU. But the VT-d spec doesn't state this anywhere. After the scalable mode is introduced, this doesn't stand for anymore, as caching mode is not relevant for the first-stage translation. A virtual IOMMU implementation is free to support first-stage translation only with caching mode cleared.
Remove the caching mode check before device TLB invalidation to ensure compatibility with the scalable mode use cases.
Fixes: 792fb43ce2c9 ("iommu/vt-d: Enable Intel IOMMU scalable mode by default") Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> --- drivers/iommu/intel/iommu.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 493b6a600394..681789b1258d 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1501,7 +1501,7 @@ static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, else __iommu_flush_iotlb_psi(iommu, did, pfn, pages, ih); - if (!cap_caching_mode(iommu->cap) && !map) + if (!map) iommu_flush_dev_iotlb(domain, addr, mask); } @@ -1575,8 +1575,7 @@ static void intel_flush_iotlb_all(struct iommu_domain *domain) iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH); - if (!cap_caching_mode(iommu->cap)) - iommu_flush_dev_iotlb(dmar_domain, 0, MAX_AGAW_PFN_WIDTH); + iommu_flush_dev_iotlb(dmar_domain, 0, MAX_AGAW_PFN_WIDTH); } if (dmar_domain->nested_parent) -- 2.34.1
| |