Messages in this thread | | | Date | Fri, 26 Apr 2024 09:29:33 -0300 | From | Arnaldo Carvalho de Melo <> | Subject | Re: [PATCH 1/1 fyi] tools headers x86 cpufeatures: Sync with the kernel sources to pick TDX, Zen, APIC MSR fence changes |
| |
On Thu, Apr 25, 2024 at 06:19:07PM -0300, Arnaldo Carvalho de Melo wrote: > tldr; Just FYI, I'm carrying this on the perf tools tree.
Sorry about the subject line, reused from a previous sync, will fix it up.
- Arnaldo
> Full explanation: > > There used to be no copies, with tools/ code using kernel headers > directly. From time to time tools/perf/ broke due to legitimate kernel > hacking. At some point Linus complained about such direct usage. Then we > adopted the current model. > > The way these headers are used in perf are not restricted to just > including them to compile something. > > There are sometimes used in scripts that convert defines into string > tables, etc, so some change may break one of these scripts, or new MSRs > may use some different #define pattern, etc. > > E.g.: > > $ ls -1 tools/perf/trace/beauty/*.sh | head -5 > tools/perf/trace/beauty/arch_errno_names.sh > tools/perf/trace/beauty/drm_ioctl.sh > tools/perf/trace/beauty/fadvise.sh > tools/perf/trace/beauty/fsconfig.sh > tools/perf/trace/beauty/fsmount.sh > $ > $ tools/perf/trace/beauty/fadvise.sh > static const char *fadvise_advices[] = { > [0] = "NORMAL", > [1] = "RANDOM", > [2] = "SEQUENTIAL", > [3] = "WILLNEED", > [4] = "DONTNEED", > [5] = "NOREUSE", > }; > $ > > The tools/perf/check-headers.sh script, part of the tools/ build > process, points out changes in the original files. > > So its important not to touch the copies in tools/ when doing changes in > the original kernel headers, that will be done later, when > check-headers.sh inform about the change to the perf tools hackers. > > To pick the changes from: > > 95a6ccbdc7199a14 ("x86/bhi: Mitigate KVM by default") > ec9404e40e8f3642 ("x86/bhi: Add BHI mitigation knob") > be482ff9500999f5 ("x86/bhi: Enumerate Branch History Injection (BHI) bug") > 0f4a837615ff925b ("x86/bhi: Define SPEC_CTRL_BHI_DIS_S") > 7390db8aea0d64e9 ("x86/bhi: Add support for clearing branch history at syscall entry") > > This causes these perf files to be rebuilt and brings some X86_FEATURE > that will be used when updating the copies of > tools/arch/x86/lib/mem{cpy,set}_64.S with the kernel sources: > > CC /tmp/build/perf/bench/mem-memcpy-x86-64-asm.o > CC /tmp/build/perf/bench/mem-memset-x86-64-asm.o > > And addresses this perf build warning: > > Warning: Kernel ABI header differences: > diff -u tools/arch/x86/include/asm/cpufeatures.h arch/x86/include/asm/cpufeatures.h > > Cc: Adrian Hunter <adrian.hunter@intel.com> > Cc: Daniel Sneddon <daniel.sneddon@linux.intel.com> > Cc: Ian Rogers <irogers@google.com> > Cc: Jiri Olsa <jolsa@kernel.org> > Cc: Namhyung Kim <namhyung@kernel.org> > Cc: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> > Cc: Thomas Gleixner <tglx@linutronix.de> > Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> > --- > tools/arch/x86/include/asm/cpufeatures.h | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h > index a38f8f9ba6572912..3c7434329661c66e 100644 > --- a/tools/arch/x86/include/asm/cpufeatures.h > +++ b/tools/arch/x86/include/asm/cpufeatures.h > @@ -461,11 +461,15 @@ > > /* > * Extended auxiliary flags: Linux defined - for features scattered in various > - * CPUID levels like 0x80000022, etc. > + * CPUID levels like 0x80000022, etc and Linux defined features. > * > * Reuse free bits when adding new feature flags! > */ > #define X86_FEATURE_AMD_LBR_PMC_FREEZE (21*32+ 0) /* AMD LBR and PMC Freeze */ > +#define X86_FEATURE_CLEAR_BHB_LOOP (21*32+ 1) /* "" Clear branch history at syscall entry using SW loop */ > +#define X86_FEATURE_BHI_CTRL (21*32+ 2) /* "" BHI_DIS_S HW control available */ > +#define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control enabled */ > +#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */ > > /* > * BUG word(s) > @@ -515,4 +519,5 @@ > #define X86_BUG_SRSO X86_BUG(1*32 + 0) /* AMD SRSO bug */ > #define X86_BUG_DIV0 X86_BUG(1*32 + 1) /* AMD DIV0 speculation bug */ > #define X86_BUG_RFDS X86_BUG(1*32 + 2) /* CPU is vulnerable to Register File Data Sampling */ > +#define X86_BUG_BHI X86_BUG(1*32 + 3) /* CPU is affected by Branch History Injection */ > #endif /* _ASM_X86_CPUFEATURES_H */ > -- > 2.44.0 >
| |