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Subject[PATCH v4 54/71] peci: cpu: Switch to new Intel CPU model defines
Date
New CPU #defines encode vendor and family as well as model.

N.B. Copy some macros from x86 <asm/cpu_device_id.h> and the
X86_VENDOR_INTEL define from <asm/processor.h> because this
code can be built for BMC's that are not based on x86 so
accessing those header files is problematic.

Signed-off-by: Tony Luck <tony.luck@intel.com>
---
include/linux/peci-cpu.h | 24 ++++++++++++++++++++++++
drivers/peci/cpu.c | 28 ++++++++++++++--------------
2 files changed, 38 insertions(+), 14 deletions(-)

diff --git a/include/linux/peci-cpu.h b/include/linux/peci-cpu.h
index ff8ae9c26c80..601cdd086bf6 100644
--- a/include/linux/peci-cpu.h
+++ b/include/linux/peci-cpu.h
@@ -6,6 +6,30 @@

#include <linux/types.h>

+/* Copied from x86 <asm/processor.h> */
+#define X86_VENDOR_INTEL 0
+
+/* Copied from x86 <asm/cpu_device_id.h> */
+#define VFM_MODEL_BIT 0
+#define VFM_FAMILY_BIT 8
+#define VFM_VENDOR_BIT 16
+#define VFM_RSVD_BIT 24
+
+#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT)
+#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT)
+#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT)
+
+#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT)
+#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT)
+#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT)
+
+#define VFM_MAKE(_vendor, _family, _model) ( \
+ ((_model) << VFM_MODEL_BIT) | \
+ ((_family) << VFM_FAMILY_BIT) | \
+ ((_vendor) << VFM_VENDOR_BIT) \
+)
+/* End of copied code */
+
#include "../../arch/x86/include/asm/intel-family.h"

#define PECI_PCS_PKG_ID 0 /* Package Identifier Read */
diff --git a/drivers/peci/cpu.c b/drivers/peci/cpu.c
index bd990acd92b8..8e8292c05551 100644
--- a/drivers/peci/cpu.c
+++ b/drivers/peci/cpu.c
@@ -294,38 +294,38 @@ peci_cpu_probe(struct peci_device *device, const struct peci_device_id *id)

static const struct peci_device_id peci_cpu_device_ids[] = {
{ /* Haswell Xeon */
- .family = 6,
- .model = INTEL_FAM6_HASWELL_X,
+ .family = VFM_FAMILY(INTEL_HASWELL_X),
+ .model = VFM_MODEL(INTEL_HASWELL_X),
.data = "hsx",
},
{ /* Broadwell Xeon */
- .family = 6,
- .model = INTEL_FAM6_BROADWELL_X,
+ .family = VFM_FAMILY(INTEL_BROADWELL_X),
+ .model = VFM_MODEL(INTEL_BROADWELL_X),
.data = "bdx",
},
{ /* Broadwell Xeon D */
- .family = 6,
- .model = INTEL_FAM6_BROADWELL_D,
+ .family = VFM_FAMILY(INTEL_BROADWELL_D),
+ .model = VFM_MODEL(INTEL_BROADWELL_D),
.data = "bdxd",
},
{ /* Skylake Xeon */
- .family = 6,
- .model = INTEL_FAM6_SKYLAKE_X,
+ .family = VFM_FAMILY(INTEL_SKYLAKE_X),
+ .model = VFM_MODEL(INTEL_SKYLAKE_X),
.data = "skx",
},
{ /* Icelake Xeon */
- .family = 6,
- .model = INTEL_FAM6_ICELAKE_X,
+ .family = VFM_FAMILY(INTEL_ICELAKE_X),
+ .model = VFM_MODEL(INTEL_ICELAKE_X),
.data = "icx",
},
{ /* Icelake Xeon D */
- .family = 6,
- .model = INTEL_FAM6_ICELAKE_D,
+ .family = VFM_FAMILY(INTEL_ICELAKE_D),
+ .model = VFM_MODEL(INTEL_ICELAKE_D),
.data = "icxd",
},
{ /* Sapphire Rapids Xeon */
- .family = 6,
- .model = INTEL_FAM6_SAPPHIRERAPIDS_X,
+ .family = VFM_FAMILY(INTEL_SAPPHIRERAPIDS_X),
+ .model = VFM_MODEL(INTEL_SAPPHIRERAPIDS_X),
.data = "spr",
},
{ }
--
2.44.0

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