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    Subject[PATCH 0/7] USB31DRD phy support for Google Tensor gs101 (HS & SS)
    Date
    This patch series add support for the Exynos USB 3.1 DRD combo phy, as found
    in Exynos 9 SoCs like Google GS101. It supports USB SS, HS and DisplayPort,
    but DisplayPort is out of scope for this series.

    In terms of UTMI+, this is very similar to the existing Exynos850
    support in this driver. The difference is that it supports both UTMI+
    (HS) and PIPE3 (SS). Firstly, there are some preparatory patches to simplify
    addition, while the bulk of the changes is around the SS part.

    Signed-off-by: André Draszik <andre.draszik@linaro.org>
    ---
    André Draszik (7):
    dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible
    phy: exynos5-usbdrd: use exynos_get_pmu_regmap_by_phandle() for PMU regs
    phy: exynos5-usbdrd: support isolating HS and SS ports independently
    phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init()
    phy: exynos5-usbdrd: uniform order of register bit macros
    phy: exynos5-usbdrd: convert to clk_bulk for phy (register) access
    phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS)

    .../bindings/phy/samsung,usb3-drd-phy.yaml | 78 ++-
    drivers/phy/samsung/Kconfig | 1 -
    drivers/phy/samsung/phy-exynos5-usbdrd.c | 753 +++++++++++++++++++--
    include/linux/soc/samsung/exynos-regs-pmu.h | 4 +
    4 files changed, 757 insertions(+), 79 deletions(-)
    ---
    base-commit: a59668a9397e7245b26e9be85d23f242ff757ae8
    change-id: 20240423-usb-phy-gs101-abf3e172d1c4

    Best regards,
    --
    André Draszik <andre.draszik@linaro.org>


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