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    Subject[PATCH v2 02/27] riscv: define default value for envcfg
    Date
    Defines a base default value for envcfg per task. By default all tasks
    should have cache zeroing capability. Any future base capabilities that
    apply to all tasks can be turned on same way.

    Signed-off-by: Deepak Gupta <debug@rivosinc.com>
    ---
    arch/riscv/include/asm/csr.h | 2 ++
    arch/riscv/kernel/process.c | 1 +
    2 files changed, 3 insertions(+)

    diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
    index 2468c55933cd..bbd2207adb39 100644
    --- a/arch/riscv/include/asm/csr.h
    +++ b/arch/riscv/include/asm/csr.h
    @@ -202,6 +202,8 @@
    #define ENVCFG_CBIE_FLUSH _AC(0x1, UL)
    #define ENVCFG_CBIE_INV _AC(0x3, UL)
    #define ENVCFG_FIOM _AC(0x1, UL)
    +/* by default all threads should be able to zero cache */
    +#define ENVCFG_BASE ENVCFG_CBZE

    /* Smstateen bits */
    #define SMSTATEEN0_AIA_IMSIC_SHIFT 58
    diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
    index 92922dbd5b5c..9a85c9d4c902 100644
    --- a/arch/riscv/kernel/process.c
    +++ b/arch/riscv/kernel/process.c
    @@ -152,6 +152,7 @@ void start_thread(struct pt_regs *regs, unsigned long pc,
    else
    regs->status |= SR_UXL_64;
    #endif
    + current->thread_info.envcfg = ENVCFG_BASE;
    }

    void flush_thread(void)
    --
    2.43.2

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