Messages in this thread | | | Date | Wed, 27 Mar 2024 10:58:03 +0300 | From | Dan Carpenter <> | Subject | Re: [RFC PATCH 07/13] pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and ETH |
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On Tue, Mar 26, 2024 at 10:28:38PM +0000, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > On RZ/V2H(P) SoC, the power registers for SD and ETH do not exist, > resulting in invalid register offsets. Ensure that the register offsets > are valid before any read/write operations are performed. If the power ^^^^^^^^^^^^ > registers are not available, both SD and ETH will be set to -EINVAL. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Where does this happen? It doesn't seem to be a part of this patchset. -EINVAL seems weird here, but it's hard to judge without actually seeing it.
regards, dan carpenter
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