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    Subject[PATCH v2 19/21] ARM: dts: qcom: apq8064: Add PCIe bridge node
    On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
    for each controller instance. Hence, add a node to represent the bridge.

    Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
    ---
    arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 10 ++++++++++
    1 file changed, 10 insertions(+)

    diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
    index 9a5ba978775a..dbe0ae2c8770 100644
    --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
    +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
    @@ -1334,6 +1334,16 @@ pcie: pcie@1b500000 {
    <&gcc PCIE_PHY_RESET>;
    reset-names = "axi", "ahb", "por", "pci", "phy";
    status = "disabled";
    +
    + pcie@0 {
    + device_type = "pci";
    + reg = <0x0 0x0 0x0 0x0 0x0>;
    + bus-range = <0x01 0xff>;
    +
    + #address-cells = <3>;
    + #size-cells = <2>;
    + ranges;
    + };
    };

    hdmi: hdmi-tx@4a00000 {
    --
    2.25.1


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