Messages in this thread | | | From | "Pucha, HimasekharX Reddy" <> | Subject | RE: [Intel-wired-lan] [iwl-net v2 2/2] igb: Fix missing time sync events | Date | Tue, 27 Feb 2024 12:04:42 +0000 |
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> -----Original Message----- > From: Intel-wired-lan <intel-wired-lan-bounces@osuosl.org> On Behalf Of Vinicius Costa Gomes > Sent: Wednesday, February 21, 2024 5:27 AM > To: intel-wired-lan@lists.osuosl.org > Cc: Neftin, Sasha <sasha.neftin@intel.com>; Gomes, Vinicius <vinicius.gomes@intel.com>; netdev@vger.kernel.org; richardcochran@gmail.com; kurt@linutronix.de; Brandeburg, Jesse <jesse.brandeburg@intel.com>; linux-kernel@vgerkernel.org; Eric Dumazet <edumazet@google.com>; Nguyen, Anthony L <anthonyl.nguyen@intel.com>; Jeff Kirsher <jeffrey.t.kirsher@intel.com>; Jakub Kicinski <kuba@kernel.org>; Paolo Abeni <pabeni@redhat.com>; David S. Miller <davem@davemloft.net> > Subject: [Intel-wired-lan] [iwl-net v2 2/2] igb: Fix missing time sync events > > Fix "double" clearing of interrupts, which can cause external events > or timestamps to be missed. > > The E1000_TSIRC Time Sync Interrupt Cause register can be cleared in two > ways, by either reading it or by writing '1' into the specific cause > bit. This is documented in section 8.16.1. > > The following flow was used: > 1. read E1000_TSIRC into 'tsicr'; > 2. handle the interrupts present into 'tsirc' and mark them in 'ack'; > 3. write 'ack' into E1000_TSICR; > > As both (1) and (3) will clear the interrupt cause, if the same > interrupt happens again between (1) and (3) it will be ignored, > causing events to be missed. > > Remove the extra clear in (3). > > Fixes: 00c65578b47b ("igb: enable internal PPS for the i210") > Acked-by: Richard Cochran <richardcochran@gmail.com> > Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> > --- > drivers/net/ethernet/intel/igb/igb_main.c | 23 +++++------------------ > 1 file changed, 5 insertions(+), 18 deletions(-) >
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
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