Messages in this thread | | | Date | Tue, 27 Feb 2024 00:26:14 +0100 | From | Andrew Lunn <> | Subject | Re: [net-next v2] net: ethernet: adi: adin1110: Reduce the MDIO_TRDONE poll interval |
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On Fri, Feb 23, 2024 at 06:21:27PM +0200, Ciprian Regus wrote: > In order to do a clause 22 access to the PHY registers of the ADIN1110, > we have to write the MDIO frame to the ADIN1110_MDIOACC register, and > then poll the MDIO_TRDONE bit (for a 1) in the same register. The > device will set this bit to 1 once the internal MDIO transaction is > done. In practice, this bit takes ~50 - 60 us to be set. > > The first attempt to poll the bit is right after the ADIN1110_MDIOACC > register is written, so it will always be read as 0. The next check will > only be done after 10 ms, which will result in the MDIO transactions > taking a long time to complete. Reduce this polling interval to 100 us. > Since this interval is short enough, switch the poll function to > readx_poll_timeout_atomic() instead. > > Reviewed-by: Nuno Sa <nuno.sa@analog.com> > Signed-off-by: Ciprian Regus <ciprian.regus@analog.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
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