Messages in this thread | | | Date | Mon, 19 Feb 2024 13:42:29 +0000 | From | Mark Brown <> | Subject | Re: [PATCH] arm64/sysreg: Add register fields for ID_AA64DFR1_EL1 |
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On Sun, Feb 18, 2024 at 06:04:34AM +0530, Anshuman Khandual wrote:
> Just wondering - would something like the following make sense. Because > 0b0000 signifies that the cycle counter would just ignore PMCR_EL0.FZS, > where as it gets frozen with 0b0001.
> UnsignedEnum 55:52 DPFZS > 0b0000 IGNR > 0b0001 FRZN > EndEnum
LGTM. [unhandled content-type:application/pgp-signature] | |