Messages in this thread Patch in this message | | | Date | Fri, 16 Feb 2024 15:17:36 -0000 | From | "tip-bot2 for Thomas Gleixner" <> | Subject | [tip: x86/apic] x86/cpu: Provide cpuid_read() et al. |
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The following commit has been merged into the x86/apic branch of tip:
Commit-ID: 43d86e3cd9a77912772cf7ad37ad94211bf7351d Gitweb: https://git.kernel.org/tip/43d86e3cd9a77912772cf7ad37ad94211bf7351d Author: Thomas Gleixner <tglx@linutronix.de> AuthorDate: Wed, 14 Feb 2024 21:29:39 +01:00 Committer: Thomas Gleixner <tglx@linutronix.de> CommitterDate: Thu, 15 Feb 2024 22:07:36 +01:00
x86/cpu: Provide cpuid_read() et al.
Provide a few helper functions to read CPUID leafs or individual registers into a data structure without requiring unions.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Juergen Gross <jgross@suse.com> Tested-by: Sohil Mehta <sohil.mehta@intel.com> Tested-by: Michael Kelley <mhklinux@outlook.com> Tested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Wang Wendy <wendy.wang@intel.com> Tested-by: K Prateek Nayak <kprateek.nayak@amd.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/878r3mg570.ffs@tglx
--- arch/x86/include/asm/cpuid.h | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 36 insertions(+)
diff --git a/arch/x86/include/asm/cpuid.h b/arch/x86/include/asm/cpuid.h index 9bee3e7..6b122a3 100644 --- a/arch/x86/include/asm/cpuid.h +++ b/arch/x86/include/asm/cpuid.h @@ -127,6 +127,42 @@ static inline unsigned int cpuid_edx(unsigned int op) return edx; } +static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs) +{ + regs[CPUID_EAX] = leaf; + regs[CPUID_ECX] = subleaf; + __cpuid(regs + CPUID_EAX, regs + CPUID_EBX, regs + CPUID_ECX, regs + CPUID_EDX); +} + +#define cpuid_subleaf(leaf, subleaf, regs) { \ + static_assert(sizeof(*(regs)) == 16); \ + __cpuid_read(leaf, subleaf, (u32 *)(regs)); \ +} + +#define cpuid_leaf(leaf, regs) { \ + static_assert(sizeof(*(regs)) == 16); \ + __cpuid_read(leaf, 0, (u32 *)(regs)); \ +} + +static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf, + enum cpuid_regs_idx regidx, u32 *reg) +{ + u32 regs[4]; + + __cpuid_read(leaf, subleaf, regs); + *reg = regs[regidx]; +} + +#define cpuid_subleaf_reg(leaf, subleaf, regidx, reg) { \ + static_assert(sizeof(*(reg)) == 4); \ + __cpuid_read_reg(leaf, subleaf, regidx, (u32 *)(reg)); \ +} + +#define cpuid_leaf_reg(leaf, regidx, reg) { \ + static_assert(sizeof(*(reg)) == 4); \ + __cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg)); \ +} + static __always_inline bool cpuid_function_is_indexed(u32 function) { switch (function) {
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