Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Fri, 16 Feb 2024 15:02:45 +0100 | Subject | Re: [PATCH 03/17] dt-bindings: clock: r9a07g054-cpg: Add power domain IDs |
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Hi Claudiu,
On Thu, Feb 8, 2024 at 1:43 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Add power domain IDs for RZ/V2L (R9A07G054) SoC. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Thanks for your patch!
I was a bit surprised to see no new definitions for the RZ/V2L blocks that are not present on RZ/G2L (e.g. DRP), but the documentation agrees.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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