Messages in this thread | | | Date | Thu, 15 Feb 2024 11:44:57 +0000 | From | Will Deacon <> | Subject | Re: [PATCH v2] perf: CXL: fix CPMU filter value mask length |
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Hi Hojin,
On Thu, Feb 15, 2024 at 05:09:06PM +0900, Hojin Nam wrote: > CPMU filter value is described as 4B length in CXL r3.0 8.2.7.2.2. > However, it is used as 2B length in code and comments. > > Signed-off-by: Hojin Nam <hj96.nam@samsung.com> > --- > > Hi Jonathan, > as you said, I didn't actually hit this. I just found it by simply > comparing the code to the CXL Spec. I removed Fixes tag and > repaired broken sign off, Thank you! > > Changes since v1: > - Remove Fixes tag (Jonathan) > - Repair broken sign off (Jonathan) > > drivers/perf/cxl_pmu.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c > index 365d964b0f6a..ca5e92f28b4a 100644 > --- a/drivers/perf/cxl_pmu.c > +++ b/drivers/perf/cxl_pmu.c > @@ -59,7 +59,7 @@ > #define CXL_PMU_COUNTER_CFG_EVENT_GRP_ID_IDX_MSK GENMASK_ULL(63, 59) > > #define CXL_PMU_FILTER_CFG_REG(n, f) (0x400 + 4 * ((f) + (n) * 8)) > -#define CXL_PMU_FILTER_CFG_VALUE_MSK GENMASK(15, 0) > +#define CXL_PMU_FILTER_CFG_VALUE_MSK GENMASK(31, 0)
Unfortunately, your patch appears to be whitespace-damaged (missing space, tabs converted to space) so I'm not able to apply it :(
Will
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