Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Wed, 31 Jan 2024 14:48:53 +0100 | Subject | Re: [PATCH v6 4/4] riscv: dts: renesas: r9a07g043f: Update gpio-ranges property |
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Hi Prabhakar,
On Tue, Jan 30, 2024 at 11:38 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Mon, Jan 29, 2024 at 2:56 PM Prabhakar <prabhakar.csengg@gmailcom> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > On RZ/Five we have additional pins compared to the RZ/G2UL SoC so update > > the gpio-ranges property in RZ/Five SoC DTSI. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > i.e. will queue in renesas-pinctrl for v6.10, as this has a hard > dependency on the pin control patches.
It's worse: the pin control patches without the DT patch breaks, soo. So I have no choice but merging patch 3/4 and 4/4.
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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