lkml.org 
[lkml]   [2024]   [Jan]   [26]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[RFC PATCH 06/41] perf: x86: Add function to switch PMI handler
    Date
    From: Xiong Zhang <xiong.y.zhang@intel.com>

    Add function to switch PMI handler since passthrough PMU and host PMU will
    use different interrupt vectors.

    Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
    Signed-off-by: Mingwei Zhang <mizhang@google.com>
    ---
    arch/x86/events/core.c | 15 +++++++++++++++
    arch/x86/include/asm/perf_event.h | 3 +++
    2 files changed, 18 insertions(+)

    diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
    index 40ad1425ffa2..3f87894d8c8e 100644
    --- a/arch/x86/events/core.c
    +++ b/arch/x86/events/core.c
    @@ -701,6 +701,21 @@ struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data)
    }
    EXPORT_SYMBOL_GPL(perf_guest_get_msrs);

    +void perf_guest_switch_to_host_pmi_vector(void)
    +{
    + lockdep_assert_irqs_disabled();
    +
    + apic_write(APIC_LVTPC, APIC_DM_NMI);
    +}
    +EXPORT_SYMBOL_GPL(perf_guest_switch_to_host_pmi_vector);
    +
    +void perf_guest_switch_to_kvm_pmi_vector(void)
    +{
    + lockdep_assert_irqs_disabled();
    +
    + apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
    +}
    +EXPORT_SYMBOL_GPL(perf_guest_switch_to_kvm_pmi_vector);
    /*
    * There may be PMI landing after enabled=0. The PMI hitting could be before or
    * after disable_all.
    diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
    index 2618ec7c3d1d..021ab362a061 100644
    --- a/arch/x86/include/asm/perf_event.h
    +++ b/arch/x86/include/asm/perf_event.h
    @@ -573,6 +573,9 @@ static inline void perf_events_lapic_init(void) { }
    static inline void perf_check_microcode(void) { }
    #endif

    +extern void perf_guest_switch_to_host_pmi_vector(void);
    +extern void perf_guest_switch_to_kvm_pmi_vector(void);
    +
    #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
    extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data);
    extern void x86_perf_get_lbr(struct x86_pmu_lbr *lbr);
    --
    2.34.1

    \
     
     \ /
      Last update: 2024-05-27 14:34    [W:2.622 / U:0.220 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site