Messages in this thread | | | Date | Tue, 5 Sep 2023 10:28:53 +0300 | Subject | Re: [PATCH v3 12/12] drm/bridge: tc358768: Attempt to fix DSI horizontal timings | From | Tomi Valkeinen <> |
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On 04/09/2023 21:46, Marcel Ziswiler wrote: > Hi Tomi > > Looks good. Thanks! Tested both on Verdin AM62 as well as on Verdin iMX8M Mini. > > Just a minor nit-pick in your code comment further below. > > On Tue, 2023-08-22 at 19:19 +0300, Tomi Valkeinen wrote: >> The DSI horizontal timing calculations done by the driver seem to often >> lead to underflows or overflows, depending on the videomode. >> >> There are two main things the current driver doesn't seem to get right: >> DSI HSW and HFP, and VSDly. However, even following Toshiba's >> documentation it seems we don't always get a working display. >> >> This patch attempts to fix the horizontal timings for DSI event mode, and >> on a system with a DSI->HDMI encoder, a lot of standard HDMI modes now >> seem to work. The work relies on Toshiba's documentation, but also quite >> a bit on empirical testing. >> >> This also adds timing related debug prints to make it easier to improve >> on this later. >> >> The DSI pulse mode has only been tested with a fixed-resolution panel, >> which limits the testing of different modes on DSI pulse mode. However, >> as the VSDly calculation also affects pulse mode, so this might cause a >> regression. >> >> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> >> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> > > For the whole series: > > Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Thanks! I have fixed the typo in the comment.
Tomi
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