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    SubjectRe: [PATCH v8 09/13] coresight-tpdm: Add nodes for dsb edge control
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    On 01/09/2023 17:01, Tao Zhang wrote:
    >
    > On 9/1/2023 10:07 PM, Suzuki K Poulose wrote:
    >> On 22/08/2023 06:26, Tao Zhang wrote:
    >>> Add the nodes to set value for DSB edge control and DSB edge
    >>> control mask. Each DSB subunit TPDM has maximum of n(n<16) EDCR
    >>> resgisters to configure edge control. DSB edge detection control
    >>> 00: Rising edge detection
    >>> 01: Falling edge detection
    >>> 10: Rising and falling edge detection (toggle detection)
    >>> And each DSB subunit TPDM has maximum of m(m<8) ECDMR registers to
    >>> configure mask. Eight 32 bit registers providing DSB interface
    >>> edge detection mask control.
    >>>
    >>> Add the nodes to configure DSB edge control and DSB edge control
    >>> mask. Each DSB subunit TPDM maximum of 256 edge detections can be
    >>> configured. The index and value sysfs files need to be paired and
    >>> written to order. The index sysfs file is to set the index number
    >>> of the edge detection which needs to be configured. And the value
    >>> sysfs file is to set the control or mask for the edge detection.
    >>> DSB edge detection control should be set as the following values.
    >>> 00: Rising edge detection
    >>> 01: Falling edge detection
    >>> 10: Rising and falling edge detection (toggle detection)
    >>> And DSB edge mask should be set as 0 or 1.
    >>> Each DSB subunit TPDM has maximum of n(n<16) EDCR resgisters to
    >>> configure edge control. And each DSB subunit TPDM has maximum of
    >>> m(m<8) ECDMR registers to configure mask.
    >>>
    >>> Add the nodes to read a set of the edge control value and mask
    >>> of the DSB in TPDM.
    >>>
    >>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
    >>> ---
    >>>   .../ABI/testing/sysfs-bus-coresight-devices-tpdm   |  51 ++++++
    >>>   drivers/hwtracing/coresight/coresight-tpdm.c       | 177
    >>> ++++++++++++++++++++-
    >>>   drivers/hwtracing/coresight/coresight-tpdm.h       |  63 ++++++++
    >>>   3 files changed, 288 insertions(+), 3 deletions(-)
    >>>
    >>> diff --git
    >>> a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
    >>> b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
    >>> index e17d1b4..097fdc4 100644
    >>> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
    >>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
    >>> @@ -57,3 +57,54 @@ Description:
    >>>           Bit[3] : Set to 0 for low performance mode.
    >>>                    Set to 1 for high performance mode.
    >>>           Bit[4:8] : Select byte lane for high performance mode.
    >>> +
    >>> +What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
    >>> +Date:        March 2023
    >>> +KernelVersion    6.5
    >>
    >> s/6.5/6.7
    > Sure, I will update this in the next patch series.
    >>
    >>> +Contact:    Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang
    >>> (QUIC) <quic_taozha@quicinc.com>
    >>> +Description:
    >>> +        (RW) Set/Get the index number of the edge detection for the DSB
    >>> +        subunit TPDM. Since there are at most 256 edge detections, this
    >>> +        value ranges from 0 to 255.
    >>> +
    >>> +What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val
    >>> +Date:        March 2023
    >>> +KernelVersion    6.5
    >>
    >> same as above
    >>
    >>> +Contact:    Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang
    >>> (QUIC) <quic_taozha@quicinc.com>
    >>> +Description:
    >>> +        Write a data to control the edge detection corresponding to
    >>> +        the index number. Before writing data to this sysfs file,
    >>> +        "ctrl_idx" should be written first to configure the index
    >>> +        number of the edge detection which needs to be controlled.
    >>> +
    >>> +        Accepts only one of the following values.
    >>> +        0 - Rising edge detection
    >>> +        1 - Falling edge detection
    >>> +        2 - Rising and falling edge detection (toggle detection)
    >>> +
    >>> +
    >>> +What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask
    >>> +Date:        March 2023
    >>> +KernelVersion    6.5
    >>> +Contact:    Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang
    >>> (QUIC) <quic_taozha@quicinc.com>
    >>> +Description:
    >>> +        Write a data to mask the edge detection corresponding to the
    >>> index
    >>> +        number. Before writing data to this sysfs file, "ctrl_idx"
    >>> should
    >>> +        be written first to configure the index number of the edge
    >>> detection
    >>> +        which needs to be masked.
    >>> +
    >>> +        Accepts only one of the 2 values -  0 or 1.
    >>> +
    >>> +What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]
    >>> +Date:        March 2023
    >>> +KernelVersion    6.5
    >>> +Contact:    Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang
    >>> (QUIC) <quic_taozha@quicinc.com>
    >>> +Description:
    >>> +        Read a set of the edge control value of the DSB in TPDM.
    >>
    >> Read edge control register n for edcr<n>.
    >
    > In fact, we don't read the register directly through this sysfs file,
    > but read the value
    >
    > we set to be written to the registers. Do I still need to modify it here?

    thats fine.

    >
    >>
    >>> +
    >>> +What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]
    >>> +Date:        March 2023
    >>> +KernelVersion    6.5
    >>> +Contact:    Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang
    >>> (QUIC) <quic_taozha@quicinc.com>
    >>> +Description:
    >>> +        Read a set of the edge control mask of the DSB in TPDM.
    >>> \ No newline at end of file
    >>> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c
    >>> b/drivers/hwtracing/coresight/coresight-tpdm.c
    >>> index 2424eb7..ba61e6a 100644
    >>> --- a/drivers/hwtracing/coresight/coresight-tpdm.c
    >>> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c
    >>> @@ -21,6 +21,29 @@
    >>>     DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm");
    >>>   +/* Read dataset array member with the index number */
    >>> +static ssize_t tpdm_simple_dataset_show(struct device *dev,
    >>> +               struct device_attribute *attr, char *buf)
    >>> +{
    >>> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
    >>> +    struct tpdm_dataset_attribute *tpdm_attr =
    >>> +        container_of(attr, struct tpdm_dataset_attribute, attr);
    >>> +
    >>> +    if (tpdm_attr->idx >= tpdm_attr->max)
    >>
    >> minor nit: See my comment on max below. We could skip max.
    > I will update this in the next patch series.
    >>
    >>> +        return -EINVAL;
    >>> +
    >>> +    switch (tpdm_attr->mem) {
    >>> +    case DSB_EDGE_CTRL:
    >>         if (tmp_attr->idx > TPDM_DSB_MAX_EDCR)
    >>             break;
    >>
    >>> +        return sysfs_emit(buf, "0x%x\n",
    >>> + drvdata->dsb->edge_ctrl[tpdm_attr->idx]);
    >>> +    case DSB_EDGE_CTRL_MASK:
    >>         if (tmp_attr->idx > TPDM_DSB_MAX_EDCMR)
    >>             break;
    >>
    >>> +        return sysfs_emit(buf, "0x%x\n",
    >>> + drvdata->dsb->edge_ctrl_mask[tpdm_attr->idx]);
    >>     }
    >>
    >>     return -EINVAL;
    > Why do we need to return this error code here?
    >>


    The whole block would look like :

    switch (tpdm->attr->mem) {
    case DSB_EDGE_CTRL:
    if (tmp_attr->idx > TPDM_DSB_MAX_EDCR)
    break;
    return sysfs_...
    case DSB_EDGE_CTRL_MASK:
    if (tmp_attr->idx > TPDM_DSB_MAX_EDCMR)
    break;
    return sysfs_...
    }

    return -EINVAL;

    Suzuki

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