Messages in this thread Patch in this message | | | From | Mark Brown <> | Date | Fri, 29 Sep 2023 16:26:08 +0200 | Subject | [PATCH 4/4] clk: versaclock7: Convert to use maple tree register cache |
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The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache.
Signed-off-by: Mark Brown <broonie@kernel.org> --- drivers/clk/clk-versaclock7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-versaclock7.c b/drivers/clk/clk-versaclock7.c index 9ab35c1af0ff..f323263e32c3 100644 --- a/drivers/clk/clk-versaclock7.c +++ b/drivers/clk/clk-versaclock7.c @@ -1275,7 +1275,7 @@ static const struct regmap_config vc7_regmap_config = { .ranges = vc7_range_cfg, .num_ranges = ARRAY_SIZE(vc7_range_cfg), .volatile_reg = vc7_volatile_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_MAPLE, .can_multi_write = true, .reg_format_endian = REGMAP_ENDIAN_LITTLE, .val_format_endian = REGMAP_ENDIAN_LITTLE, -- 2.39.2
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