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SubjectRe: [PATCH v1] i2c: designware: Disable TX_EMPTY irq while waiting for block length byte
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On 9/29/23 06:53, Tam Nguyen wrote:
> During SMBus block data read process, we have seen high interrupt rate
> because of TX_EMPTY irq status while waiting for block length byte (the
> first data byte after the address phase). The interrupt handler does not
> do anything because the internal state is kept as STATUS_WRITE_IN_PROGRESS.
> Hence, we should disable TX_EMPTY irq until I2C DW receives first data
> byte from I2C device, then re-enable it.
>
> It takes 0.789 ms for host to receive data length from slave.
> Without the patch, i2c_dw_isr is called 99 times by TX_EMPTY interrupt.
> And it is none after applying the patch.
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Chuong Tran <chuong@os.amperecomputing.com>
> Signed-off-by: Tam Nguyen <tamnguyenchi@os.amperecomputing.com>
> ---
> drivers/i2c/busses/i2c-designware-master.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>

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