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SubjectRe: [PATCH V2 4/4] gpio: sprd: Support 8 banks EIC controller
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On 9/21/2023 5:00 PM, Wenhua Lin wrote:
> In order to solve the problem of insufficient eic,
> it supports 8 banks of eic controller, each bank contains 8 eic.
>
> Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com>
> ---
> drivers/gpio/gpio-eic-sprd.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c
> index e85addbdf8aa..6bb002060c3e 100644
> --- a/drivers/gpio/gpio-eic-sprd.c
> +++ b/drivers/gpio/gpio-eic-sprd.c
> @@ -51,10 +51,10 @@
> #define SPRD_EIC_SYNC_DATA 0x1c
>
> /*
> - * The digital-chip EIC controller can support maximum 3 banks, and each bank
> + * The digital-chip EIC controller can support maximum 8 banks, and each bank
> * contains 8 EICs.
> */
> -#define SPRD_EIC_MAX_BANK 3
> +#define SPRD_EIC_MAX_BANK 8
> #define SPRD_EIC_PER_BANK_NR 8
> #define SPRD_EIC_DATA_MASK GENMASK(7, 0)
> #define SPRD_EIC_BIT(x) ((x) & (SPRD_EIC_PER_BANK_NR - 1))
> @@ -615,9 +615,9 @@ static int sprd_eic_probe(struct platform_device *pdev)
>
> for (i = 0; i < SPRD_EIC_MAX_BANK; i++) {
> /*
> - * We can have maximum 3 banks EICs, and each EIC has
> + * We can have maximum 8 banks EICs, and each EIC has
> * its own base address. But some platform maybe only
> - * have one bank EIC, thus base[1] and base[2] can be
> + * have one bank EIC, thus base[1] and base[7] can be

Should be "base[1] to base[7]"

> * optional.
> */
> res = platform_get_resource(pdev, IORESOURCE_MEM, i);

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