Messages in this thread | | | Date | Mon, 18 Sep 2023 10:37:29 +0200 | Subject | Re: [PATCH] tracing/user_events: align uaddr on unsigned long alignment | From | Clément Léger <> |
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On 17/09/2023 23:09, David Laight wrote: > From: Clément Léger >> Sent: 14 September 2023 14:11 >> >> enabler->uaddr can be aligned on 32 or 64 bits. If aligned on 32 bits, >> this will result in a misaligned access on 64 bits architectures since >> set_bit()/clear_bit() are expecting an unsigned long (aligned) pointer. >> On architecture that do not support misaligned access, this will crash >> the kernel. Align uaddr on unsigned long size to avoid such behavior. >> This bug was found while running kselftests on RISC-V. > > You don't want to do it on x86-64 either. > A locked accesses that crosses a cache line boundary is horrid. > So horrid that recent cpu's can be made to fault.
Hi David,
Thanks for the additional information.
> > I'd also doubt that other cpu that can do misaligned transfers > can even do locked ones. > > For x86 (and LE) the long[] bitmap can be treated as char[] > avoiding all the problems. > > Perhaps there ought to be bit a bit-array based on char[] > (not long[]) that would be endianness independent and > use byte-sized atomics.
That would work for a few architectures but I don't think all of them have byte "grain" atomics. So I guess Masami solution (long aligned set/clear_bit()) remains the best out there.
Clément
> (IIRC that is still an issue on sparc32...) > > David > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK > Registration No: 1397386 (Wales)
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