Messages in this thread | | | From | Nathan Rossi <> | Date | Mon, 18 Sep 2023 12:20:31 +1000 | Subject | Re: [PATCH] soc: imx8m: Enable OCOTP clock for imx8mm before reading registers |
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On Mon, 14 Aug 2023 at 11:57, Nathan Rossi <nathan@nathanrossi.com> wrote: > > From: Nathan Rossi <nathan.rossi@digi.com> > > Commit 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading the > register") added configuration to enable the OCOTP clock before > attempting to read from the associated registers. > > This same kexec issue is present with the imx8m SoCs that use the > imx8mm_soc_uid function (e.g. imx8mp). This requires the imx8mm_soc_uid > function to configure the OCOTP clock before accessing the associated > registers. This change implements the same clock enable functionality > that is present in the imx8mq_soc_revision function for the > imx8mm_soc_uid function.
Gentle ping. Are there any comments or feedback on this change?
Thanks, Nathan
> > Signed-off-by: Nathan Rossi <nathan.rossi@digi.com> > --- > drivers/soc/imx/soc-imx8m.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c > index 1dcd243df5..ec87d9d878 100644 > --- a/drivers/soc/imx/soc-imx8m.c > +++ b/drivers/soc/imx/soc-imx8m.c > @@ -100,6 +100,7 @@ static void __init imx8mm_soc_uid(void) > { > void __iomem *ocotp_base; > struct device_node *np; > + struct clk *clk; > u32 offset = of_machine_is_compatible("fsl,imx8mp") ? > IMX8MP_OCOTP_UID_OFFSET : 0; > > @@ -109,11 +110,20 @@ static void __init imx8mm_soc_uid(void) > > ocotp_base = of_iomap(np, 0); > WARN_ON(!ocotp_base); > + clk = of_clk_get_by_name(np, NULL); > + if (IS_ERR(clk)) { > + WARN_ON(IS_ERR(clk)); > + return; > + } > + > + clk_prepare_enable(clk); > > soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset); > soc_uid <<= 32; > soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset); > > + clk_disable_unprepare(clk); > + clk_put(clk); > iounmap(ocotp_base); > of_node_put(np); > } > --- > 2.40.1
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