Messages in this thread Patch in this message | | | From | Mark Brown <> | Date | Thu, 14 Sep 2023 11:09:30 +0100 | Subject | [PATCH 2/2] arm64: Document missing userspace visible fields in ID_AA64ISAR2_EL1 |
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We have exposed a number of fields in ID_AA64ISAR2_EL1 to usersapce without adding the matching documentation in cpu-feature-registers.rst, update it to match the implementation.
Signed-off-by: Mark Brown <broonie@kernel.org> --- Documentation/arch/arm64/cpu-feature-registers.rst | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/Documentation/arch/arm64/cpu-feature-registers.rst b/Documentation/arch/arm64/cpu-feature-registers.rst index 4e4625f2455f..46fd82acafab 100644 --- a/Documentation/arch/arm64/cpu-feature-registers.rst +++ b/Documentation/arch/arm64/cpu-feature-registers.rst @@ -288,8 +288,18 @@ infrastructure: +------------------------------+---------+---------+ | Name | bits | visible | +------------------------------+---------+---------+ + | CSSC | [55-52] | y | + +------------------------------+---------+---------+ + | RPRFM | [51-48] | y | + +------------------------------+---------+---------+ + | BC | [23-20] | y | + +------------------------------+---------+---------+ | MOPS | [19-16] | y | +------------------------------+---------+---------+ + | APA3 | [15-12] | y | + +------------------------------+---------+---------+ + | GPA3 | [11-8] | y | + +------------------------------+---------+---------+ | RPRES | [7-4] | y | +------------------------------+---------+---------+ | WFXT | [3-0] | y | -- 2.30.2
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