Messages in this thread | | | From | Stanley Chang[昌育德] <> | Subject | RE: [PATCH v2 RESEND 1/2] usb: dwc3: core: configure TX/RX threshold for DWC3_IP | Date | Tue, 12 Sep 2023 03:39:46 +0000 |
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Hi Thinh,
> > > > > > > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > > > > index > > > > 9c6bf054f15d..1f74a53816c3 100644 > > > > --- a/drivers/usb/dwc3/core.c > > > > +++ b/drivers/usb/dwc3/core.c > > > > @@ -1246,6 +1246,39 @@ static int dwc3_core_init(struct dwc3 *dwc) > > > > } > > > > } > > > > > > > > + if (DWC3_IP_IS(DWC3)) { > > > > > > Would you mind also add the checks for DWC_usb31 and DWC_usb32? > Both > > > the > > > DWC_usb31 and DWC_usb32 share the same field offsets within > > > GTX/RXTHRCFG registers. The macros are already defined for those IPs. > > > > DWC3 and DWC31, DWC32 seem to have different register definition as > follows. > > Yes. That's what I meant. They are already define in the core.h for DWC_usb31. > DWC_usb32 also shares the same offsets as DWC_usb31 for this. > Can you also include the setting of GTX/RXTHRCFG logic for those 2 IPs? > I understand. I will add them.
Thanks, Stanley
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