Messages in this thread | | | Date | Mon, 11 Sep 2023 09:23:30 +0800 | Subject | Re: [PATCH 2/3] pinctrl: qcom: Add SM4450 pinctrl driver | From | Tengfei Fan <> |
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在 9/8/2023 4:45 PM, Konrad Dybcio 写道: > On 8.09.2023 08:38, Tengfei Fan wrote: >> Add pinctrl driver for TLMM block found in SM4450 SoC. >> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >> --- > [...] > >> +/* Every pin is maintained as a single group, and missing or non-existing pin > /* > * Every pin > >> + * would be maintained as dummy group to synchronize pin group index with >> + * pin descriptor registered with pinctrl core. >> + * Clients would not be able to request these dummy pin groups. >> + */ > [...] > >> +static const int sm4450_acpi_reserved_gpios[] = { >> + 0, 1, 2, 3, 136, -1 >> +}; > Are you ever going to boot with ACPI on this platform? > > Why reserve UFS_RESET? > > Why are 0-3 reserved? FP reader? Please leave a comment. Or > delete this. > > Konrad Thanks Konrad reviewed this patch, will do more test and disscuss about this reserve gpio setting, and will remove this in next patch if possible.
-- Thx and BRs, Tengfei Fan
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