Messages in this thread | | | Date | Wed, 9 Aug 2023 21:57:37 +0200 | Subject | Re: [PATCH 2/4] clk: qcom: branch: Add mem ops support for branch2 clocks | From | Konrad Dybcio <> |
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On 8.08.2023 07:14, Imran Shaik wrote: > From: Taniya Das <quic_tdas@quicinc.com> > > Clock CBCRs with memories need an update for memory before enable/disable > of the clock. Add support for the mem ops to handle this sequence. > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> > --- Could you expand the commit message a bit? What does this clock memory do?
[..]
> +static int clk_branch2_mem_enable(struct clk_hw *hw) > +{ > + struct clk_branch *br = to_clk_branch(hw); > + u32 val; > + int count = 200; > + > + regmap_update_bits(br->clkr.regmap, br->mem_enable_reg, > + br->mem_enable_ack_bit, br->mem_enable_ack_bit); > + > + regmap_read(br->clkr.regmap, br->mem_ack_reg, &val); > + > + while (count-- > 0) { > + if (val & br->mem_enable_ack_bit) > + return clk_branch2_enable(hw); > + udelay(1); > + regmap_read(br->clkr.regmap, br->mem_ack_reg, &val); > + } readl_poll_timeout?
Konrad
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