Messages in this thread | | | Date | Sun, 6 Aug 2023 21:35:03 +0200 | Subject | Re: [PATCH v2 3/5] dt-bindings: clock: add Intel Agilex5 clock manager | From | Krzysztof Kozlowski <> |
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On 01/08/2023 03:02, niravkumar.l.rabara@intel.com wrote: > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> > > Add clock ID definitions for Intel Agilex5 SoCFPGA. > The registers in Agilex5 handling the clock is named as clock manager. > > Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com> > Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> > ---
Do not attach (thread) your patchsets to some other threads (unrelated or older versions). This buries them deep in the mailbox and might interfere with applying entire sets.
Best regards, Krzysztof
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