Messages in this thread | | | Date | Wed, 30 Aug 2023 14:33:08 +0200 | Subject | Re: [PATCH v8 4/6] soc: qcom: Add LLCC support for multi channel DDR | From | Konrad Dybcio <> |
| |
On 30.08.2023 14:32, Konrad Dybcio wrote: > On 30.08.2023 12:56, Komal Bajaj wrote: >> Add LLCC support for multi channel DDR configuration >> based on a feature register. >> >> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> >> --- > [...] > > global pointer to a error code to avoid referencing it */ >> @@ -1031,6 +1050,7 @@ static int qcom_llcc_probe(struct platform_device *pdev) >> const struct qcom_llcc_config *cfg; >> const struct llcc_slice_config *llcc_cfg; >> u32 sz; >> + u8 cfg_index; >> u32 version; >> struct regmap *regmap; >> >> @@ -1052,7 +1072,10 @@ static int qcom_llcc_probe(struct platform_device *pdev) >> ret = -EINVAL; >> goto err; >> } >> - cfg = &cfgs->llcc_config[0]; > This is unnecessary, get_cfg_index returns 0 when no nvmem cell is > present. Sorry this is a minus and not a plus
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
| |