Messages in this thread | | | Date | Thu, 3 Aug 2023 11:07:53 +0530 | Subject | Re: [PATCH v8 2/5] arm64: dts: ti: k3-j784s4-main: Add WIZ and SERDES PHY nodes | From | Jayesh Choudhary <> |
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Hello Roger,
On 01/08/23 22:26, Roger Quadros wrote: > > > On 01/08/2023 10:00, Jayesh Choudhary wrote: >> From: Siddharth Vadapalli <s-vadapalli@ti.com> >> >> J784S4 SoC has 4 Serdes instances along with their respective WIZ >> instances. Add device-tree nodes for them and disable them by default. >> >> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> >> [j-choudhary@ti.com: fix serdes_wiz clock order & disable serdes refclk] >> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> >> --- >> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 172 +++++++++++++++++++++ >> 1 file changed, 172 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >> index 8a816563706b..fbf5ab94d785 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >> @@ -6,9 +6,19 @@ >> */ >> >> #include <dt-bindings/mux/mux.h> >> +#include <dt-bindings/phy/phy.h> >> +#include <dt-bindings/phy/phy-ti.h> >> >> #include "k3-serdes.h" >> >> +/ { >> + serdes_refclk: serdes-refclk { > > standard name should begin with clock > >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + status = "disabled"; >> + }; >> +}; >> + >> &cbass_main { >> msmc_ram: sram@70000000 { >> compatible = "mmio-sram"; >> @@ -709,6 +719,168 @@ main_sdhci1: mmc@4fb0000 { >> status = "disabled"; >> }; >> >> + serdes_wiz0: wiz@5060000 { >> + compatible = "ti,j784s4-wiz-10g"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + power-domains = <&k3_pds 404 TI_SCI_PD_EXCLUSIVE>; >> + clocks = <&k3_clks 404 2>, <&k3_clks 404 6>, <&serdes_refclk>, <&k3_clks 404 5>; >> + clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk"; >> + assigned-clocks = <&k3_clks 404 6>; >> + assigned-clock-parents = <&k3_clks 404 10>; >> + num-lanes = <4>; >> + #reset-cells = <1>; >> + #clock-cells = <1>; >> + ranges = <0x5060000 0x00 0x5060000 0x10000>; >> +> + status = "disabled"; >> + > drop blank lines here and rest of this file where you set status to "disabled". > >> + serdes0: serdes@5060000 { > > phy@5060000
According to the bindings, serdes is valid. (./Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml) It would throw dtbs_check errors with phy@. If its a binding change that you are suggesting, then it can be picked up later on for all platform at once.
So keeping it as serdes@50*0000 on all the suggested places.
> >> + compatible = "ti,j721e-serdes-10g"; >> + reg = <0x05060000 0x010000>;
[...]
>> + >> + serdes1: serdes@5070000 { > > phy@5070000 >> + compatible = "ti,j721e-serdes-10g"; >> + reg = <0x05070000 0x010000>; >> + reg-names = "torrent_phy";
[...]
>> + >> + status = "disabled"; >> + >> + serdes2: serdes@5020000 { > > phy@5020000 > >> + compatible = "ti,j721e-serdes-10g"; >> + reg = <0x05020000 0x010000>;
[...]
>> + status = "disabled"; >> + >> + serdes4: serdes@5050000 { > > phy@5050000 > >> + /*
[...]
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