Messages in this thread Patch in this message | | | From | Arnd Bergmann <> | Subject | [PATCH v3 7/7] x86: qspinlock-paravirt: fix mising-prototype warning | Date | Thu, 3 Aug 2023 10:26:19 +0200 |
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From: Arnd Bergmann <arnd@arndb.de>
__pv_queued_spin_unlock_slowpath is defined in a header file as a global function, and designed to be called from an inline asm, but there is no prototype visible in the definition:
kernel/locking/qspinlock_paravirt.h:493:1: error: no previous prototype for '__pv_queued_spin_unlock_slowpath' [-Werror=missing-prototypes]
Add this to the x86 header that contains the inline asm calling it, and ensure this gets included before the definition, rather than after it.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- v3: split out native_pv_lock_init() changes into a separate patch, keeping only __pv_queued_spin_unlock_slowpath here --- arch/x86/include/asm/qspinlock_paravirt.h | 2 ++ kernel/locking/qspinlock_paravirt.h | 20 ++++++++++---------- 2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/arch/x86/include/asm/qspinlock_paravirt.h b/arch/x86/include/asm/qspinlock_paravirt.h index 42b17cf10b10e..85b6e3609cb92 100644 --- a/arch/x86/include/asm/qspinlock_paravirt.h +++ b/arch/x86/include/asm/qspinlock_paravirt.h @@ -4,6 +4,8 @@ #include <asm/ibt.h> +void __lockfunc __pv_queued_spin_unlock_slowpath(struct qspinlock *lock, u8 locked); + /* * For x86-64, PV_CALLEE_SAVE_REGS_THUNK() saves and restores 8 64-bit * registers. For i386, however, only 1 32-bit register needs to be saved diff --git a/kernel/locking/qspinlock_paravirt.h b/kernel/locking/qspinlock_paravirt.h index 6afc249ce697d..6a0184e9c2348 100644 --- a/kernel/locking/qspinlock_paravirt.h +++ b/kernel/locking/qspinlock_paravirt.h @@ -485,6 +485,16 @@ pv_wait_head_or_lock(struct qspinlock *lock, struct mcs_spinlock *node) return (u32)(atomic_read(&lock->val) | _Q_LOCKED_VAL); } +/* + * Include the architecture specific callee-save thunk of the + * __pv_queued_spin_unlock(). This thunk is put together with + * __pv_queued_spin_unlock() to make the callee-save thunk and the real unlock + * function close to each other sharing consecutive instruction cachelines. + * Alternatively, architecture specific version of __pv_queued_spin_unlock() + * can be defined. + */ +#include <asm/qspinlock_paravirt.h> + /* * PV versions of the unlock fastpath and slowpath functions to be used * instead of queued_spin_unlock(). @@ -533,16 +543,6 @@ __pv_queued_spin_unlock_slowpath(struct qspinlock *lock, u8 locked) pv_kick(node->cpu); } -/* - * Include the architecture specific callee-save thunk of the - * __pv_queued_spin_unlock(). This thunk is put together with - * __pv_queued_spin_unlock() to make the callee-save thunk and the real unlock - * function close to each other sharing consecutive instruction cachelines. - * Alternatively, architecture specific version of __pv_queued_spin_unlock() - * can be defined. - */ -#include <asm/qspinlock_paravirt.h> - #ifndef __pv_queued_spin_unlock __visible __lockfunc void __pv_queued_spin_unlock(struct qspinlock *lock) { -- 2.39.2
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