Messages in this thread Patch in this message | | | From | Ilkka Koskinen <> | Subject | [PATCH 1/4] perf vendor events arm64: Remove L1D_CACHE_LMISS from AmpereOne list | Date | Thu, 3 Aug 2023 14:13:28 -0700 |
| |
amperene/cache.json file tried to include L1D_CACHE_LMISS while it doesn't exist in common-and-microarch.json. While this bug doesn't seem to cause issue in newer kernels with jevents.py script, it prevents building older perf tools with the backported patch.
Fixes: a9650b7f6fc0 ("perf vendor events arm64: Add AmpereOne core PMU events") Reported-by: Dave Kleikamp <dave.kleikamp@oracle.com> Closes: https://lore.kernel.org/all/76bb2e47-ce44-76ae-838e-53279047084d@oracle.com/ Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> --- tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 3 --- 1 file changed, 3 deletions(-)
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json index fc0633054211..7a2b7b200f14 100644 --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json @@ -92,9 +92,6 @@ { "ArchStdEvent": "L1D_CACHE_LMISS_RD" }, - { - "ArchStdEvent": "L1D_CACHE_LMISS" - }, { "ArchStdEvent": "L1I_CACHE_LMISS" }, -- 2.40.1
| |