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SubjectRe: [PATCH RFC DNM] perf: Add support for Qualcomm Last-Level Cache Controller PMU
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On 8/9/2023 1:09 PM, Konrad Dybcio wrote:
> Add support for the Qualcomm LLCC (Last-Level Cache Controller) PMU,
> which provides a single event, expressing cache read misses.
>
> Based on the vendor driver found in the msm-5.10 downstream kernel.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> Hi, I've been trying to get this driver going upstream by cleaning it
> up and adding the necessary perf boilerplate (the original Qualcomm one
> only pokes at the PMU from within the kernel itself) to use the
> userspace tool.
>
> I can not however get it to cooperate.. in this iteration I get a PMU
> event registered (though with only a "raw" name - no "x OR y" like with
> other PMUs on the system) as:
>
> llcc_pmu/read_miss/ [Kernel PMU event]
>
> but the .read callback is never called when I run:
>
> sudo perf stat -C 0 -a -e llcc_pmu/read_miss/ stress-ng -C 8 -c 8 -m 10
>
> which always returns 0
>
> if I add --always-kernel I get:
> <not supported> llcc_pmu/read_miss/

Which SOC you are trying this on?


--
---Trilok Soni

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