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    Subject[PATCH v5 15/37] arm64/idreg: Add overrride for GCS
    Hook up an override for GCS, allowing it to be disabled from the command
    line by specifying arm64.nogcs in case there are problems.

    Signed-off-by: Mark Brown <broonie@kernel.org>
    ---
    Documentation/admin-guide/kernel-parameters.txt | 3 +++
    arch/arm64/kernel/idreg-override.c | 2 ++
    2 files changed, 5 insertions(+)

    diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
    index 722b6eca2e93..db58fc2133fb 100644
    --- a/Documentation/admin-guide/kernel-parameters.txt
    +++ b/Documentation/admin-guide/kernel-parameters.txt
    @@ -418,6 +418,9 @@
    arm64.nobti [ARM64] Unconditionally disable Branch Target
    Identification support

    + arm64.nogcs [ARM64] Unconditionally disable Guarded Control Stack
    + support
    +
    arm64.nopauth [ARM64] Unconditionally disable Pointer Authentication
    support

    diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c
    index 2fe2491b692c..49269a5cff10 100644
    --- a/arch/arm64/kernel/idreg-override.c
    +++ b/arch/arm64/kernel/idreg-override.c
    @@ -99,6 +99,7 @@ static const struct ftr_set_desc pfr1 __initconst = {
    .override = &id_aa64pfr1_override,
    .fields = {
    FIELD("bt", ID_AA64PFR1_EL1_BT_SHIFT, NULL ),
    + FIELD("gcs", ID_AA64PFR1_EL1_GCS_SHIFT, NULL),
    FIELD("mte", ID_AA64PFR1_EL1_MTE_SHIFT, NULL),
    FIELD("sme", ID_AA64PFR1_EL1_SME_SHIFT, pfr1_sme_filter),
    {}
    @@ -178,6 +179,7 @@ static const struct {
    { "arm64.nosve", "id_aa64pfr0.sve=0" },
    { "arm64.nosme", "id_aa64pfr1.sme=0" },
    { "arm64.nobti", "id_aa64pfr1.bt=0" },
    + { "arm64.nogcs", "id_aa64pfr1.gcs=0" },
    { "arm64.nopauth",
    "id_aa64isar1.gpi=0 id_aa64isar1.gpa=0 "
    "id_aa64isar1.api=0 id_aa64isar1.apa=0 "
    --
    2.30.2

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