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SubjectRe: [PATCH v1 9/9] media: qcom: camss: Fix csid-gen2 for test pattern generator
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On 22/08/2023 17:38, Konrad Dybcio wrote:
> On 22.08.2023 18:16, Bryan O'Donoghue wrote:
>> From: Andrey Konovalov <andrey.konovalov@linaro.org>
>>
>> In the current driver csid Test Pattern Generator (TPG) doesn't work.
>> This change:
>> - fixes writing frame width and height values into CSID_TPG_DT_n_CFG_0
>> - fixes the shift by one between test_pattern control value and the
>> actual pattern.
>> So that TPG starts working, but with the below limitations:
>> - only test_pattern=9 works as it should
>> - test_pattern=8 and test_pattern=7 produce black frame (all zeroes)
>> - the rest of test_pattern's don't work (yavta doesn't get the data)
>> - regardless of the CFA pattern set by 'media-ctl -V' the actual pixel
>> order is always the same (RGGB for any RAW8 or RAW10P format in
>> 4608x2592 resolution).
>>
>> Tested with:
>>
>> RAW10P format, VC0:
>> media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4608x2592 field:none]'
>> media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4608x2592 field:none]'
>> media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
>> v4l2-ctl -d /dev/v4l-subdev6 -c test_pattern=9
>> yavta -B capture-mplane --capture=3 -n 3 -f SRGGB10P -s 4608x2592 /dev/video0
>>
>> RAW10P format, VC1:
>> media-ctl -V '"msm_csid0":2[fmt:SRGGB10/4608x2592 field:none]'
>> media-ctl -V '"msm_vfe0_rdi1":0[fmt:SRGGB10/4608x2592 field:none]'
>> media-ctl -l '"msm_csid0":2->"msm_vfe0_rdi1":0[1]'
>> v4l2-ctl -d /dev/v4l-subdev6 -c test_pattern=9
>> yavta -B capture-mplane --capture=3 -n 3 -f SRGGB10P -s 4608x2592 /dev/video1
>>
>> RAW8 format, VC0:
>> media-ctl --reset
>> media-ctl -V '"msm_csid0":0[fmt:SRGGB8/4608x2592 field:none]'
>> media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB8/4608x2592 field:none]'
>> media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
>> yavta -B capture-mplane --capture=3 -n 3 -f SRGGB8 -s 4608x2592 /dev/video0
>>
>> Fixes: eebe6d00e9bf ("media: camss: Add support for CSID hardware version Titan 170")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org>
>> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>> ---
> That's a whole lot to unroll..
>
> [...]
>> if (tg->enabled) {
>> - /* Config Test Generator */
>> - vc = 0xa;
>> -
> Which part does this hunk correlate to?
>
>> /* configure one DT, infinite frames */
>> val = vc << TPG_VC_CFG0_VC_NUM;
>> val |= INTELEAVING_MODE_ONE_SHOT << TPG_VC_CFG0_LINE_INTERLEAVING_MODE;
>> @@ -370,14 +367,14 @@ static void __csid_configure_stream(struct csid_device *csid, u8 enable, u8 vc)
>>
>> writel_relaxed(0x12345678, csid->base + CSID_TPG_LFSR_SEED);
>>
>> - val = input_format->height & 0x1fff << TPG_DT_n_CFG_0_FRAME_HEIGHT;
>> - val |= input_format->width & 0x1fff << TPG_DT_n_CFG_0_FRAME_WIDTH;
>> + val = (input_format->height & 0x1fff) << TPG_DT_n_CFG_0_FRAME_HEIGHT;
>> + val |= (input_format->width & 0x1fff) << TPG_DT_n_CFG_0_FRAME_WIDTH;
>> writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_0(0));
> This screams necessity for FIELD_PREP/GET! Could you please convert
> it in another series if you have time for it?

I mean yes I want to or want it done. To me 1 << somevalue is just silly
when you can say BIT(somevalue).

There will be a "make it pretty series".

I'll do a V2 of this series and explain in the commit log what's
happening with the removal of vc = 0xa; since if someone has to ask, its
not obvious whats going on.

---
bod

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