Messages in this thread | | | From | Sai Krishna Gajula <> | Subject | Re: [net-next PATCH v3] octeontx2-pf: Use PTP HW timestamp counter atomic update feature | Date | Mon, 21 Aug 2023 06:05:03 +0000 |
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> -----Original Message----- > From: Leon Romanovsky <leon@kernel.org> > Sent: Saturday, August 19, 2023 12:19 AM > To: Sai Krishna Gajula <saikrishnag@marvell.com> > Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org; > pabeni@redhat.com; netdev@vger.kernel.org; linux- > kernel@vger.kernel.org; Sunil Kovvuri Goutham <sgoutham@marvell.com>; > Geethasowjanya Akula <gakula@marvell.com>; Subbaraya Sundeep Bhatta > <sbhatta@marvell.com>; Hariprasad Kelam <hkelam@marvell.com>; > richardcochran@gmail.com; kalesh-anakkur.purayil@broadcom.com; Naveen > Mamindlapalli <naveenm@marvell.com> > Subject: Re: [net-next PATCH v3] octeontx2-pf: Use PTP HW timestamp > counter atomic update feature > > On Thu, Aug 17, 2023 at 11:13:51PM +0530, Sai Krishna wrote: > > Some of the newer silicon versions in CN10K series supports a feature > > where in the current PTP timestamp in HW can be updated atomically > > without losing any cpu cycles unlike read/modify/write register. > > This patch uses this feature so that PTP accuracy can be improved > > while adjusting the master offset in HW. There is no need for SW > > timecounter when using this feature. So removed references to SW > > timecounter wherever appropriate. > > > > Signed-off-by: Sai Krishna <saikrishnag@marvell.com> > > Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> > > Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> > > Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> > > --- > > v3: > > - Addressed review comments given by Jakub Kicinski > > 1. Fixed re-ordering of headers in alphabetical order > > 2. Refactored SoC revision identification logic > > 3. CN10K errata revisions can be different from atomic update > > supported revision devices. > > 4. Removed ptp device check. > > v2: > > - Addressed review comments given by Simon Horman, Kalesh Anakkur > Purayil > > 1. Removed inline keyword for function in .c file > > 2. Modified/optimized conditions related boolean > > > > .../net/ethernet/marvell/octeontx2/af/mbox.h | 12 ++ > > .../net/ethernet/marvell/octeontx2/af/ptp.c | 155 ++++++++++++++-- > > .../net/ethernet/marvell/octeontx2/af/ptp.h | 3 +- > > .../net/ethernet/marvell/octeontx2/af/rvu.c | 2 +- > > .../net/ethernet/marvell/octeontx2/af/rvu.h | 12 ++ > > .../marvell/octeontx2/nic/otx2_common.h | 1 + > > .../ethernet/marvell/octeontx2/nic/otx2_ptp.c | 174 > > ++++++++++++++---- > > 7 files changed, 304 insertions(+), 55 deletions(-) > > <...> > > > +static bool is_tstmp_atomic_update_supported(struct otx2_ptp *ptp) { > > + struct ptp_get_cap_rsp *rsp; > > + struct msg_req *req; > > + int err; > > + > > + if (!ptp->nic) > > + return false; > > + > > + mutex_lock(&ptp->nic->mbox.lock); > > + req = otx2_mbox_alloc_msg_ptp_get_cap(&ptp->nic->mbox); > > + if (!req) > > + return false; > > + > > + err = otx2_sync_mbox_msg(&ptp->nic->mbox); > > + if (err) > > + return false; > > Shouldn't you call to mutex_unlock() in two returns above?
Ack, will submit V4 patch.
Thanks Sai > > Thanks > > > + > > + rsp = (struct ptp_get_cap_rsp *)otx2_mbox_get_rsp(&ptp->nic- > >mbox.mbox, 0, > > + &req->hdr); > > + mutex_unlock(&ptp->nic->mbox.lock); > > + > > + if (IS_ERR(rsp)) > > + return false; > > + > > + if (rsp->cap & PTP_CAP_HW_ATOMIC_UPDATE) > > + return true; > > + > > + return false; > > +}
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