Messages in this thread | | | From | Nylon Chen <> | Date | Mon, 21 Aug 2023 15:51:14 +0800 | Subject | Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module |
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Hi Andreas,
Currently, due to the lack of support for the unwind table in RISC-V, we have disabled it.
If RISC-V were to support the unwind table in the future, would we need to re-enable it? Would this require implementing related changes(module relocation type handler) at that time?
Nylon Chen <nylon.chen@sifive.com> 於 2023年6月15日 週四 下午5:47寫道:
Nylon Chen <nylon.chen@sifive.com> 於 2023年6月15日 週四 下午5:47寫道: > > On Thu, Jun 15, 2023 at 11:11:49AM +0200, Andreas Schwab wrote: > > On Jun 15 2023, Nylon Chen wrote: > > > Hi Andreas, > > > Because LLVM currently has it enabled by default(https://reviews.llvm.org/D145164), it will generate this > > > relocation type. > > > > > >>From what I know, GCC will also enable it in the future. > > > > That's why the kernel explicitly disables it. > Ok, thanks for your feedback, after I cross-tested, there is indeed no relevant relocation type generated. > > If this error no longer occurs. > > I am open to the idea of adding this patch to the upstream and would like to hear your thoughts on whether it is still necessary. > > > > -- > > Andreas Schwab, SUSE Labs, schwab@suse.de > > GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 > > "And now for something completely different."
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