Messages in this thread | | | Date | Wed, 2 Aug 2023 09:55:10 +0100 | Subject | Re: [PATCH] coresight: trbe: Directly use ID_AA64DFR0_EL1_TraceBuffer_IMP | From | James Clark <> |
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On 02/08/2023 07:36, Anshuman Khandual wrote: > is_trbe_available() checks for the TRBE support via extracting TraceBuffer > field value from ID_AA64DFR0_EL1, and ensures that it is implemented. This > replaces the open encoding '0b0001' with 'ID_AA64DFR0_EL1_TraceBuffer_IMP' > which is now available via sysreg tools. Functional change is not intended. > > Cc: Suzuki K Poulose <suzuki.poulose@arm.com> > Cc: Mike Leach <mike.leach@linaro.org> > Cc: James Clark <james.clark@arm.com> > Cc: Leo Yan <leo.yan@linaro.org> > Cc: coresight@lists.linaro.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> > --- > drivers/hwtracing/coresight/coresight-trbe.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h > index 94e67009848a..ebb9108d8e24 100644 > --- a/drivers/hwtracing/coresight/coresight-trbe.h > +++ b/drivers/hwtracing/coresight/coresight-trbe.h > @@ -24,7 +24,7 @@ static inline bool is_trbe_available(void) > unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0, > ID_AA64DFR0_EL1_TraceBuffer_SHIFT); > > - return trbe >= 0b0001; > + return trbe >= ID_AA64DFR0_EL1_TraceBuffer_IMP; > } > > static inline bool is_trbe_enabled(void)
Reviewed-by: James Clark <james.clark@arm.com>
Kind of unrelated to this change, but it seems like a lot of feature checks like this avoid using any value altogether when it's just 0 or 1. For example the same check for TRBE in kvm:
/* Check if we have TRBE implemented and available at the host */ if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) && ...
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