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SubjectRE: [PATCH v3 2/4] net: stmmac: dwc-qos: Add FSD EQoS support
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> -----Original Message-----
> From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@linaro.org]
> Sent: 15 August 2023 01:21
> To: Sriranjani P <sriranjani.p@samsung.com>; davem@davemloft.net;
> edumazet@google.com; kuba@kernel.org; pabeni@redhat.com;
> robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> conor+dt@kernel.org; richardcochran@gmail.com;
> alexandre.torgue@foss.st.com; joabreu@synopsys.com;
> mcoquelin.stm32@gmail.com; alim.akhtar@samsung.com; linux-
> fsd@tesla.com; pankaj.dubey@samsung.com; swathi.ks@samsung.com;
> ravi.patel@samsung.com
> Cc: netdev@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-samsung-soc@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; Chandrasekar R <rcsekar@samsung.com>;
> Suresh Siddha <ssiddha@tesla.com>
> Subject: Re: [PATCH v3 2/4] net: stmmac: dwc-qos: Add FSD EQoS support
>
> On 14/08/2023 13:25, Sriranjani P wrote:
> > The FSD SoC contains two instance of the Synopsys DWC ethernet QOS IP
> core.
> > The binding that it uses is slightly different from existing ones
> > because of the integration (clocks, resets).
> >
> > For FSD SoC, a mux switch is needed between internal and external clocks.
> > By default after reset internal clock is used but for receiving
> > packets properly, external clock is needed. Mux switch to external
> > clock happens only when the external clock is present.
> >
> > Signed-off-by: Chandrasekar R <rcsekar@samsung.com>
> > Signed-off-by: Suresh Siddha <ssiddha@tesla.com>
> > Signed-off-by: Swathi K S <swathi.ks@samsung.com>
> > Signed-off-by: Sriranjani P <sriranjani.p@samsung.com>
> > ---
>
>
> > +static int dwc_eqos_setup_rxclock(struct platform_device *pdev, int
> > +ins_num) {
> > + struct device_node *np = pdev->dev.of_node;
> > + struct regmap *syscon;
> > + unsigned int reg;
> > +
> > + if (np && of_property_read_bool(np, "fsd-rx-clock-skew")) {
> > + syscon = syscon_regmap_lookup_by_phandle_args(np,
> > + "fsd-rx-clock-
> skew",
> > + 1, &reg);
> > + if (IS_ERR(syscon)) {
> > + dev_err(&pdev->dev,
> > + "couldn't get the rx-clock-skew syscon!\n");
> > + return PTR_ERR(syscon);
> > + }
> > +
> > + regmap_write(syscon, reg, rx_clock_skew_val[ins_num]);
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int fsd_eqos_clk_init(struct fsd_eqos_plat_data *plat,
> > + struct plat_stmmacenet_data *data) {
> > + int ret = 0, i;
> > +
> > + const struct fsd_eqos_variant *fsd_eqos_v_data =
> > + plat->fsd_eqos_inst_var;
> > +
> > + plat->clks = devm_kcalloc(plat->dev, fsd_eqos_v_data->num_clks,
> > + sizeof(*plat->clks), GFP_KERNEL);
> > + if (!plat->clks)
> > + return -ENOMEM;
> > +
> > + for (i = 0; i < fsd_eqos_v_data->num_clks; i++)
> > + plat->clks[i].id = fsd_eqos_v_data->clk_list[i];
> > +
> > + ret = devm_clk_bulk_get(plat->dev, fsd_eqos_v_data->num_clks,
> > + plat->clks);
>
> Instead of duplicating entire clock management with existing code, you
> should extend/rework existing one.
>
> This code is unfortunately great example how not to stuff vendor code into
> upstream project. :(

I will check again if I can extend existing one to support FSD platform specific requirement.

>
> > +
> > + return ret;
> > +}
> > +
> > +static int fsd_clks_endisable(void *priv, bool enabled) {
> > + int ret, num_clks;
> > + struct fsd_eqos_plat_data *plat = priv;
> > +
> > + num_clks = plat->fsd_eqos_inst_var->num_clks;
> > +
> > + if (enabled) {
> > + ret = clk_bulk_prepare_enable(num_clks, plat->clks);
> > + if (ret) {
> > + dev_err(plat->dev, "Clock enable failed, err = %d\n",
> ret);
> > + return ret;
> > + }
> > + } else {
> > + clk_bulk_disable_unprepare(num_clks, plat->clks);
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int fsd_eqos_probe(struct platform_device *pdev,
> > + struct plat_stmmacenet_data *data,
> > + struct stmmac_resources *res)
> > +{
> > + struct fsd_eqos_plat_data *priv_plat;
> > + struct device_node *np = pdev->dev.of_node;
> > + int ret = 0;
> > +
> > + priv_plat = devm_kzalloc(&pdev->dev, sizeof(*priv_plat),
> GFP_KERNEL);
> > + if (!priv_plat) {
> > + ret = -ENOMEM;
>
> return -ENOMEM

Will fix this in v4.

>
> > + goto error;
> > + }
> > +
> > + priv_plat->dev = &pdev->dev;
> > + data->bus_id = of_alias_get_id(np, "eth");
>
> No, you cannot do like this. Aliases are board specific and are based on
> labeling on the board.

So if I understood this correctly, I need to move alias in the board specific DTS file and I can use this, because we have to handle rx-clock-skew differently for the two instances in the FSD platform. Another approach we took in v1, by specifying the value to be programmed in rx-clock-skew property itself, but it seems it is not a preferred approach.
I can see that in drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +436 common code is already using this API and getting alias id, so I can probably use the same rather getting same again here, but I have to specify alias in DTS file.

>
> > +
> > + priv_plat->fsd_eqos_inst_var = &fsd_eqos_clk_info[data->bus_id];
> > +
> > + ret = fsd_eqos_clk_init(priv_plat, data);
> > +
> > + data->bsp_priv = priv_plat;
> > + data->clks_config = fsd_clks_endisable;
> > + data->rxmux_setup = dwc_eqos_rxmux_setup;
> > +
> > + ret = fsd_clks_endisable(priv_plat, true);
> > + if (ret)
> > + goto error;
> > +
> > + ret = dwc_eqos_setup_rxclock(pdev, data->bus_id);
> > + if (ret) {
> > + fsd_clks_endisable(priv_plat, false);
> > + dev_err_probe(&pdev->dev, ret, "Unable to setup
> rxclock\n");
>
> The syntax is: return dev_err_probe().

Will fix it in v4.

>
> > + }
> > +
> > +error:
> > + return ret;
> > +}
>
> ....
>
>
> Best regards,
> Krzysztof


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