Messages in this thread | | | From | Will Deacon <> | Subject | Re: [PATCH v2] perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09 | Date | Tue, 15 Aug 2023 15:10:50 +0100 |
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On Mon, 14 Aug 2023 20:40:12 +0800, Yicong Yang wrote: > From: Yicong Yang <yangyicong@hisilicon.com> > > Some HiSilicon SMMU PMCG suffers the erratum 162001900 that the PMU > disable control sometimes fail to disable the counters. This will lead > to error or inaccurate data since before we enable the counters the > counter's still counting for the event used in last perf session. > > [...]
Applied to will (for-next/perf), thanks!
[1/1] perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09 https://git.kernel.org/will/c/0242737dc4eb
Cheers, -- Will
https://fixes.arm64.dev https://next.arm64.dev https://will.arm64.dev
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