Messages in this thread | | | Date | Mon, 14 Aug 2023 15:29:40 +0200 | From | Wolfram Sang <> | Subject | Re: [PATCH v2 2/2] i2c: designware: Handle invalid SMBus block data response length value |
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On Wed, Jul 26, 2023 at 03:00:01PM +0700, Tam Nguyen wrote: > In the I2C_FUNC_SMBUS_BLOCK_DATA case, the invalid length byte value > (outside of 1-32) of the SMBus block data response from the Slave device > is not correctly handled by the I2C Designware driver. > > In case IC_EMPTYFIFO_HOLD_MASTER_EN==1, which cannot be detected > from the registers, the Master can be disabled only if the STOP bit > is set. Without STOP bit set, the Master remains active, holding the bus > until receiving a block data response length. This hangs the bus and > is unrecoverable. > > Avoid this by issuing another dump read to reach the stop condition when > an invalid length byte is received. > > Cc: stable@vger.kernel.org > Signed-off-by: Tam Nguyen <tamnguyenchi@os.amperecomputing.com>
Applied to for-current, thanks!
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