Messages in this thread | | | From | Thomas Gleixner <> | Subject | RE: [patch v2 28/38] x86/cpu: Provide an AMD/HYGON specific topology parser | Date | Sun, 30 Jul 2023 09:41:02 +0200 |
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On Sun, Jul 30 2023 at 05:20, Michael Kelley wrote: > From: Thomas Gleixner <tglx@linutronix.de> Sent: Friday, July 28, 2023 5:13 AM >> + /* >> + * If leaf 0xb is available, then SMT shift is set already. If not >> + * take it from ecx.threads_per_cpu and use topo_update_dom() as > > "take it from ebx.threads_per_cu and use topology_update_dom() as" > >> + * topology_set_dom() would propagate and overwrite the already >> + * propagated CORE level. >> + */ >> + if (!has_0xb) { >> + topology_update_dom(tscan, TOPO_SMT_DOMAIN, get_count_order(leaf.threads_per_cu), >> + leaf.threads_per_cu); > > leaf.threads_per_cu needs to be (leaf.threads_per_cu + 1) above. If > the core has two hyper-threads, the value of the threads_per_cu > field returned by CPUID is "1". > > All my Hyper-V VMs on AMD processors were coming up with only > one thread per core. The change fixes the problem.
You are right. Thanks for tracking that down!
tglx
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