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SubjectRe: [PATCH v1] arm64: dts: qcom: sc7280: Add PCIe0 node
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On 7/28/2023 5:33 PM, Krzysztof Kozlowski wrote:
> On 28/07/2023 12:39, Krishna chaitanya chundru wrote:
>> Add PCIe dtsi node for PCIe0 controller on sc7280 platform.
>>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> Thank you for your patch. There is something to discuss/improve.
>
>
>> + pcie0_phy: phy@1c06000 {
>> + compatible = "qcom,sm8250-qmp-gen3x1-pcie-phy";
>> + reg = <0 0x01c06000 0 0x1c0>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> + clocks = <&gcc GCC_PCIE_0_AUX_CLK>,
>> + <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
>> + <&gcc GCC_PCIE_CLKREF_EN>,
>> + <&gcc GCC_PCIE0_PHY_RCHNG_CLK>;
>> + clock-names = "aux", "cfg_ahb", "ref", "refgen";
>> +
>> + resets = <&gcc GCC_PCIE_0_PHY_BCR>;
>> + reset-names = "phy";
>> +
>> + assigned-clocks = <&gcc GCC_PCIE0_PHY_RCHNG_CLK>;
>> + assigned-clock-rates = <100000000>;
>> +
>> + status = "disabled";
>> +
>> + pcie0_lane: phy@1c0e6200 {
> Isn't this old-style of bindings? Wasn't there a change? On what tree
> did you base it?
Let me rebase and send it again.
>> +
>> + pcie0_wake_n: pcie0-wake-n {
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).
>
> Nodes end with 'state'.

I will run it send it again.

Thanks,

KC

>
>> + pins = "gpio89";
>> + function = "gpio";
>> +
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
> Best regards,
> Krzysztof
>

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