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    SubjectRe: [PATCH v12 0/7] MT8188 IOMMU SUPPORT
    On Fri, Jun 2, 2023 at 5:03 PM Yong Wu <yong.wu@mediatek.com> wrote:
    >
    > MT8188 have 3 IOMMU HWs. 2 IOMMU HW is for multimedia, and 1 IOMMU HW
    > is for infra-master, like PCIe.
    >
    > About the 2 MM IOMMU HW, the connection could be something like this:
    >
    > IOMMU(VDO) IOMMU(VPP)
    > | |
    > SMI_COMMON(VDO) SMI_COMMON(VPP)
    > --------------- ----------------
    > | | ... | | ...
    > larb0 larb2 ... larb1 larb3 ...
    >
    > INFRA IOMMU does not have SMI, the master connects to IOMMU directly.
    >
    > Although multiple banks supported in MT8188, we only use one of them,
    > which means PCIe is put in bank0 of INFRA IOMMU.
    >
    > So we have two pgtable for MT8188, specifically, these two MM IOMMU HW
    > share a pgtable while INFRA IOMMU HW use a independent pgtable.
    >
    > Another change is that we add some SMC command for INFRA master to
    > enable INFRA IOMMU in ATF considering security concerns.
    >
    > We also adjust the flow of mtk_iommu_config to reduce indention.

    A friendly ping - this series was reviewed, but I'm not sure if it's
    still on the radar today.
    This can be cleanly applied on top of next-20230725.

    To give more confidence, I also tested the basic multimedia and infra
    functionalities on my MT8188 with this series, so

    Tested-by: Fei Shao <fshao@chromium.org>

    to the entire v12 series.

    Regards,
    Fei

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